Differences

This shows you the differences between two versions of the page.

--- commands:ttl [2026/01/27 18:28] – [Report Mode (MS-2000 Only)] add '' for clarity brandon
+++ commands:ttl [2026/06/19 19:35] (current) – add space to bottom of page brandon
@@ Line 3: / Line 3: @@
 TTL functionality differs based on whether the controller is a Tiger (TG-1000) or MS2000/RM2000 controller, due to hardware differences. Some TTL modes are only available with certain firmware modules.
-The Tiger (TG-1000) and MS2000 controller electronics have a buffered TTL input (''IN0'') and output (''OUT0'') port that are usually connected to the IN and OUT BNC connectors on the back of the controller. These ports allow voltages in the range of 0V to 5V as an input, where any voltage below 0.95v(+-0.3v) is a LOGIC LOW signal. Any signal above 1.6 V (+-0.3 V) is considered a LOGIC HIGH state. Any signals in between 0.95 to 1.6 V will maintain the same logic state that was registered from the last //known// state (Schmitt Triggered inputs). The TTL input has a 10K Ohm resistor to ground, and connecting to the input of a Schmitt Trigger 5W TTL gate. The output is CMOS-compatible 5v TTL directly from a single CMOS gate. The behavior of these connectors are determined by the ''IN0_mode'' and ''OUT0_mode'' parameters set by the ''TTL X'' and ''TTL Y'' commands respectively. There are also has several unbuffered I/O ports on the motherboard that are occasionally exposed for special purposes.
+The Tiger (TG-1000) and MS2000 controller electronics have a buffered TTL input (''IN0'') and output (''OUT0'') port that are usually connected to the IN and OUT BNC connectors on the back of the controller. These ports allow voltages in the range of 0V to 5V as an input, where any voltage below 0.95v(+-0.3v) is a LOGIC LOW signal. Any signal above 1.6 V (+-0.3 V) is considered a LOGIC HIGH state. Any signals in between 0.95 to 1.6 V will maintain the same logic state that was registered from the last //known// state (Schmitt Triggered inputs). The TTL input has a 10K Ohm resistor to ground, and connecting to the input of a Schmitt Trigger 5v TTL gate. The output is CMOS-compatible 5v TTL directly from a single CMOS gate. The behavior of these connectors are determined by the ''IN0_mode'' and ''OUT0_mode'' parameters set by the ''TTL X'' and ''TTL Y'' commands respectively. There are also has several unbuffered I/O ports on the motherboard that are occasionally exposed for special purposes.
 <WRAP center round important 60%>
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-**3** - <del>output TTL OUT0 gated HIGH during axis index 0 (X) constant speed move</del> **not implemented but hardware-level TTL signal is available**.
+**3** - <del>output TTL OUT0 gated HIGH during axis index 0 (X) constant speed move</del> **not implemented but ''[[../synchronized_zaxis_focus_sweeps|hardware-level TTL signal]]'' is available**.
 ----
-**4** - <del>output TTL OUT0 gated HIGH during axis index 1 (Y) constant speed move</del> **not implemented but hardware-level TTL signal is available**.
+**4** - <del>output TTL OUT0 gated HIGH during axis index 1 (Y) constant speed move</del> **not implemented but ''[[../synchronized_zaxis_focus_sweeps|hardware-level TTL signal]]'' is available**.
 ----
-**5** - <del>output TTL OUT0 gated HIGH during axis index 2 (Z) constant speed move</del> **not implemented but hardware-level TTL signal is available**.
+**5** - <del>output TTL OUT0 gated HIGH during axis index 2 (Z) constant speed move</del> **not implemented but ''[[../synchronized_zaxis_focus_sweeps|hardware-level TTL signal]]'' is available**.
 ----
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   * X array index as 16-bit unsigned int (AIJ X? equivalent)
   * Y array index as 16-bit unsigned int (AIJ Y? equivalent)
+\\
+The next value is the Z-stack index (ZS T? equivalent, related to the ZS command)
 Next the encoder value for all axes in order as 32-bit signed integer in twos-complement, 4 bytes per axis (can be converted to reported position using multiplier)
@@ Line 285: / Line 288: @@
   * To validate the checksum repeat the same steps but include the 16-bit checksum value in the running sum. The computed checksum should be 0000.  If not there was an error in checksum generation or transmission of the data.
-Example: firmware includes ''ARRAY_MODULE'', ''CRISP'' and has X Y and Z axes.  TTL Y=2 sets a TTL pulse at the end of the move.  TTL T=51 sets this report format.  The report will be a string of numbers like this (spaces for readability only)
+Example: firmware includes ''ARRAY_MODULE'', ''CRISP'' and has X Y and Z axes.  ''TTL Y=2'' sets a TTL pulse at the end of the move.  ''TTL T=51'' sets this report format.  The report will be a string of numbers like this (spaces for readability only)
 ''0002 0001 0003 1E00 FFFF FFFF FFFF FFEE FC81 0679 0D DF0F 0D''
@@ Line 300: / Line 303: @@
 For MS2000/RM2000, the controller replies with the inverse polarity, <wrap reply> :A 1 </wrap> when the signal is low and <wrap reply> :A 0 </wrap> when the signal is high.  This is a logical bug in the firmware, but because it was in the field so long before being noticed we made the intentional decision to keep the behavior unchanged.
+\\
 {{tag>commands led tiger ms2000 tgled crisp ttl spim array servolock_ttl}}

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